29876ds features dabic-5 8-channel source driver with overcurrent protection udn2987 x -6 package a , 20-pin dip approximate scale 1:1 out1 in4 in5 in6 in7 in8 fault in3 2987 out2 out3 out4 out5 out6 out7 out8 in2 in1 4.75 to 35 v 1 to 8 load components cpu gnd vs oe/r providing overcurrent protection for each of its eight sourcing outputs, the udn2987a-6 and udn2987lw-6 drivers are used as an interface between standard low-level logic and relays, motors, solenoids, leds, and incandescent lamps. these devices include thermal shut down and output transient protection/clamp diodes for use with sustaining voltages to 35 v. in these drivers, each channel includes a latch to turn off that channel if the maximum channel current is exceeded. all channels are disabled if the thermal shutdown is activated. a common fault output is used to indicate either chip thermal shutdown or any overcurrent condition. all outputs are enabled by pulling the common oe/r input high. when oe/r is low, all outputs are inhibited and the eight latches are reset. the oe/r function can be especially important during power-up, in preventing floating inputs from turning on the outputs. under normal operating conditions, each of eight outputs will source in excess of 100 ma continuously at an ambient temperature of 25c and a supply of 35 v. the over-current fault circuit will protect the device from short-circuits to ground with supply voltages of up to 30 v. the inputs are compatible with 5 and 12 v logic systems: ttl, schottky ttl, dtl, pmos, and cmos. in all cases, the output is switched on by an active high input level. compared to their predecessor devices, the udn2987a and udn2987lw, the udn2987a-6 and udn2987lw-6 have a significantly faster t phl (200 ns typical) and a lower driver supply voltage rating (4.75 v), which allows the use of 5 v logic. the udn2987a-6 is supplied in a 20-pin dual in-line plastic (dip) package; the udn2987lw-6 is supplied in a 20-lead small-outline (soic-w) plastic package. the pb (lead) free versions have 100% matte-tin leadframe plating. package lw , 20-pin soic-w 4.75 to 35 v driver supply voltage output enable-disable (oe/r) 350 ma output source current overcurrent protected internal ground clamp diodes output breakdown voltage 35 v minimum ttl, dtl, pmos, or cmos compatible inputs internal thermal shut down (tsd) typical application applications relays motors solenoids leds incandescent lamps
29876ds, rev. 1pb w orceste r , massachusetts 01615-0036 (508) 853-5000 1 15 northeast cuto f f, box 15036 ww w .allegromicro.com allegro microsystems, inc. dabic-5 8-channel source driver with overcurrent protection udn2987 x -6 2 d n o c l o b m y s r e t e m a r a p . n i m s n o i t i max . unit s v e g a t l o v y l p p u s s ? 3 5 v continuous output current * i out outputs are disabled at approximately ?500 m a ?50 0 ? ma v e g a t l o v t u p t u o t l u a f ce ? 3 5 v i t n e r r u c t u p t u o t l u a f c ? 3 0 ma v e g a t l o v t u p n i in ?0. 3 1 4 v t e r u t a r e p m e t n o i t c n u j j ? 15 0 c storage t emperature rang e t s ?5 5 15 0 c operating t emperature rang e t a ?2 0 8 5 c *for input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin. selection guide absolute maximum ratings part number pb-free* packing package udn2987a-6-t y es 18 pieces/tube 20-pin dip udn2987 l w -6-t y es 37 pieces/tube 20-pin soic, wide body udn2987 l wtr-6-t y es 1000 pieces/13-in. reel *pb-based variants are being phased out of the product line. the variants cited in this footnote are in production but have been determined to be las t time bu y . this classification indicates that sale of this device is cur - rently restricted to existing customer applications. the variants should not be purchased for new design applica - tions because obsolescence in the near future is probable. samples are no longer available. status change: october 31, 2006. deadline for receipt fo las t time bu y orders: april 27, 2007. these variants include: udn2987a-6, udn2987 l w -6, and udn2987 l wtr-6.
29876ds worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. dabic-5 8-channel source driver with overcurrent protection udn2987 x -6 3 functional block diagram pin-out diagram terminal list table number name description 1 in1 logic input 1 2 in2 logic input 2 3 in3 logic input 3 4 in4 logic input 4 5 in5 logic input 5 6 in6 logic input 6 7 in7 logic input 7 8 in8 logic input 8 9 fault fault output 10 oe/ r logic input for output enable and reset 11 vs supply voltage 12 gnd supply ground 13 out8 output 8 to load 14 out7 output 7 to load 15 out6 output 6 to load 16 out5 output 5 to load 17 out4 output 4 to load 18 out3 output 3 to load 19 out2 output 2 to load 20 out1 output 1 to load dwg. pp-067 1 2 3 4 5 6 7 8 14 15 16 17 18 19 20 9 10 11 12 13 oe n oe sense n ff x8 in1 in2 in3 in4 in5 in6 in7 in8 fault oe/r out1 out2 out3 out4 out5 out6 out7 out8 gnd vs adil soi in1 gnd vs ? out1 in8 out8 fault driver 1 of 8 drivers oe/r + C q rs thermal shut down
29876ds worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. dabic-5 8-channel source driver with overcurrent protection udn2987 x -6 4 electrical characteristics , valid at t a = 25c, v oer = 2.4 v, v s = 35 v, unless otherwise noted characteristic symbol test conditions min. typ. 1 max. units supply voltage functional range v s 4.75 ? 35 v output leakage current 2 i outcex v in = 0.4 v, all inputs simultaneously ?200 29876ds worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. dabic-5 8-channel source driver with overcurrent protection udn2987 x -6 5 thermal characteristics characteristics symbol test conditions rating unit package thermal resistance * r ja package a, on 4-layer board based on jedec standard 32 c/w package lw, on 4-layer board based on jedec standard 48 c/w * additional thermal information is available on the allegro web site. t a (c) p d (w) 0 0.5 1.5 2.0 2.5 3.0 3.5 4.0 1.0 25 50 75 100 125 150 power dissipation versus ambient temperature (r q ja = 48 oc/w) package lw (r q ja = 32 oc/w) package a
29876ds worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. dabic-5 8-channel source driver with overcurrent protection udn2987 x -6 6 characteristic performance allowable output current as a function of duty cycle (udn2987a-6 shown, multiply by 78% for udn2987lw-6) t a = 25c, v s = 35 v t a = 50c, v s = 35 v 0 102030405060708090100 400 350 300 250 200 150 100 50 0 duty cycle (%) collector current (ma) 87 6 5 4 3 quantity of outputs conducting simultaneously output current waveshapes 0 102030405060708090100 400 350 300 250 200 150 100 50 0 duty cycle (%) collector current (ma) 876 5 4 3 2 quantity of outputs conducting simultaneously v in(a) = v in(b) i sh i out(a) i out(b) i m t blank t rtb t plh t phl oe/r output (a) shorted momentary fault or capacitive charging (<1s)
29876ds worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. dabic-5 8-channel source driver with overcurrent protection udn2987 x -6 7 applications information and circuit description as with all power integrated circuits, the udn2987a-6 and udn2987lw-6 have a maximum allowable output current rating. the 500 ma rating does not imply that operation at that value is permitted or even obtainable. the channel out- put current trip point is specified as ?370 ma, minimum; therefore, attempted operation at current levels greater than ?370 ma may cause a fault indication and channel shut down. the device is tested at a maximum of ?350 ma and that is the recommended maximum output current per driver. it provides protection for current overloads or shorted loads up to 30 v. all outputs are enabled by pulling the oe/r input high. when oe/r is low or allowed to float (internal pull-down), all outputs are inhibited and the latches are reset. note that the reset pulse duration (oe/r low) should be at least 1 s. this will ensure safe operation under attempted reset condi- tions with a shorted load. the latches are also reset during power-up, regardless of the state of the oe/r input. the load current causes a small voltage drop across the internal low-value sense resistor. this voltage is com- pared to the voltage drop across a reference resistor with a constant current. the two resistors are matched to elimi- nate errors due to manufacturing tolerances or tempera- ture effects. each channel includes a comparator and its own latch. an overcurrent fault (v sense > v ref ) will set the affected latch and shut down only that channel. all other channels will continue to operate normally. the latch includes a 1 s blanking delay, t blank , to prevent unwanted triggering due to crossover currents generated when switching inductive loads. for an abrupt short circuit, the blanking and output switching times will allow a brief, permissable current in excess of the trip current before the output driver is turned off. a common thermal shut down disables all outputs if the chip temperature exceeds 165c. at thermal shut down, all latches are reset. the outputs are disabled until the chip cools down to approximately 150c (thermal hysteresis). in the event of an overcurrent condition on any channel, or chip thermal shut down, the fault open-collector output is pulled low (turned on). overcurrent fault sense circuit + C + C + C v s v ref v sense i load i ref sense to fault latch matched ref
29876ds worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. dabic-5 8-channel source driver with overcurrent protection udn2987 x -6 8 package a, 20-pin dip .070 .045 1.78 1.14 .150 .115 3.81 2.92 .195 .115 4.95 2.92 .014 .008 0.36 0.20 .430 max 10.92 .015 min 2.92 .005 min 0.13 1.060 0.980 26.92 24.89 a b c seating plane .022 .014 .056 .036 24x .010 [0.25] m c .100 .2.54 .300 .7.62 .280 .240 7.11 6.10 2 1 20 a preliminary dimensions, for reference only dimensions in inches metric dimensions (mm) in brackets, for reference only (reference jedec ms-001 ad) dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown a terminal #1 mark area package l, 20-pin sic- 0.30 0.10 .012 .004 2.65 2.35 .104 .093 7.60 7.40 .299 .291 0.33 0.20 .013 .008 8o 0o 1.27 0.40 .050 .016 13.00 12.60 .512 .496 c seating plane a b c 0.10 [.004] 20x 0.25 .010 0.51 0.31 .020 .012 20x 0.25 [.010] m c a b 10.63 9.97 .419 .393 0.25 [.010] m b m 1.27 .050 2 1 20 gauge plane seating plane preliminary dimensions, for reference only dimensions in millimeters u.s. customary dimensions (in.) in brackets, for reference only (reference jedec ms-013 ac) dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown a terminal #1 mark area a
29876ds worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. dabic-5 8-channel source driver with overcurrent protection udn2987 x -6 9 the products described herein are manufactured under one or more of the following u.s. patents: 5,045,920; 5,264,783; 5,44 2,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. allegro microsystems, inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to permit improvements in the per for mance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro products are not authorized for use as critical components in life-support devices or sys tems without express written approval. the in for ma tion in clud ed herein is believed to be ac cu rate and reliable. how ev er, allegro microsystems, inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. copyright?2006, allegro microsystems, inc.
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